Flip chip technology has been used for a number of years by the microelectronics industry to attach semiconductor devices to substrates. In this technology, the device is “bumped” with solder bumps that are reflowed to similar bumps on a substrate. The solder is allowed to melt on both the device and the substrate when the two are in contact with each other in a reflow oven.
While this method has worked very well for older technologies, the industry is reaching a point where conventional flip chip bump fabrication schemes are not suitable for today's devices. The reliability of the under-bump metallization (UBM) and the constituent film stack, typically consisting of tantalum nitride/nickel-vanadium/copper, is of issue and mechanical and electrical failures are most commonly found in this region. The UBM typically consists of 2 or 3 films with a total thickness of less than 1.5 to 2 microns, compared to the solder that is typically 50 to 100 microns thick. Unless the UBM/chip/substrate bond is mechanically and metallurgically sound, cracking and delamination can occur within the UBM, resulting in poor device reliability.
Moreover, there has been an emphasis in the microelectronics industry to eliminate lead-based solders from devices and the manufacturing process and begin using lead-free materials in forming the solder bumps that are used to electrically attach integrated circuits (IC) chips to an operative substrate.
To address this issue the industry has recently turned to a copper pillar technology. In such technologies, a passivation layer is deposited over the final or uppermost copper interconnect layer. An opening is formed in the passivation layer to expose the underlying interconnect layer and a barrier layer is deposited therein, followed by the deposition of a copper seed layer. Photoresist is then deposited and patterned and etched to form an opening in the photoresist to expose the underlying barrier layer located within the opening formed in the passivation layer. Copper is deposited into the opening to partially fill it. A lead-free solder from a group consisting of tin-based or silver-copper-tin based materials is deposited into the remainder of the opening. The photoresist is removed, which results in a single-pillar structure that is located within and fills the opening in the passivation layer.
While this device is acceptable for current technologies, there is a concern that this structure will not have sufficient mechanical stability as technologies continue to shrink. The reason for this concern is that in these structures, there is only a small area of solder that is available for connection. In view of this, the joint can fatigue whether lead or lead-free solder is used. Further, since the bond area is confined to only the top regions of the pillar, if a slight mis-registry occurs during the assembly process, it may create problems, such as an electrical open.
Accordingly, what is needed in the art is a solder bump structure that addresses both the metallurgical concerns and mechanical stability concerns associated with the above-discussed conventional structures.